全书首先介绍了BIOS和UEFI两类固件的结构与启动流程;然后从UEFI的优点与BIOS的缺点作为切入,讲述UEFI取代BIOS的原因;最后通过若干个程序实例,逐步对现有系统进行改造,使其支持UEFI引导启动。" />
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错!应该是0x0FFFFFFF0处执行程序。详情见Intel system developer manuals第三卷第九章Processor Management and Initialization。摘录如下:
9.1.4 First Instruction Executed
The first instruction that is fetched and executed following a hardware reset is located at physical address
FFFFFFF0H. This address is 16 bytes below the processor’s uppermost physical address. The EPROM containing the
software-initialization code must be located at this address.
The address FFFFFFF0H is beyond the 1-MByte addressable range of the processor while in real-address mode. The
processor is initialized to this starting address as follows. The CS register has two parts: the visible segment
selector part and the hidden base address part. In real-address mode, the base address is normally formed by
shifting the 16-bit segment selector value 4 bits to the left to produce a 20-bit base address. However, during a
hardware reset, the segment selector in the CS register is loaded with F000H and the base address is loaded with
FFFF0000H. The starting address is thus formed by adding the base address to the value in the EIP register (that
is, FFFF0000 + FFF0H = FFFFFFF0H).
The first time the CS register is loaded with a new value after a hardware reset, the processor will follow the normal
rule for address translation in real-address mode (that is, [CS base address = CS segment selector * 16]). To
insure that the base address in the CS register remains unchanged until the EPROM based software-initialization
code is completed, the code must not contain a far jump or far call or allow an interrupt to occur (which would
cause the CS selector value to be changed).